请教 FlexSPI Configuration block中Lookup table数据格式

armfly

关于这个配置块，其他字段在RM中都解释了，基本都能理解。Lookup table查询表这个字段（256字节）没有看明白（标注红框的）。
有网友研究过没有，这个Lookup table 的具体格式，以及和LUT Sequence的关系。

这是有elftosb.exe工具生成的数据块。

eric2013

NXP官方的资料做的不完善，用户得费很大的劲才可以找到资料，花了2个小时找到了一个配置实例，但是还不够详细，需要官方后面出专门的文档才行。
1. 安装找个软件包


2. 在安装路径的的XIP文件夹里面有四个文件，D:\Keil_v525pre2\ARM\PACK\Keil\iMXRT1052_DevelopersKit_BSP\1.0.0\SDK\devices\MIMXRT1052\xip
其中
fsl_flexspi_nor_flash.c配置实例
fsl_flexspi_nor_flash.h详细配置和注释说明。


3. fsl_flexspi_nor_flash.h内容

1. /*
   
2. * Copyright (c) 2016, Freescale Semiconductor, Inc.
   
3. * Copyright 2016-2017 NXP
   
4. *
   
5. * Redistribution and use in source and binary forms, with or without
   
6. * modification,
   
7. * are permitted provided that the following conditions are met:
   
8. *
   
9. * o Redistributions of source code must retain the above copyright notice, this
   
10. * list
    
11. *   of conditions and the following disclaimer.
    
12. *
    
13. * o Redistributions in binary form must reproduce the above copyright notice,
    
14. * this
    
15. *   list of conditions and the following disclaimer in the documentation and/or
    
16. *   other materials provided with the distribution.
    
17. *
    
18. * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
    
19. *   contributors may be used to endorse or promote products derived from this
    
20. *   software without specific prior written permission.
    
21. *
    
22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    
23. * AND
    
24. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
    
25. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
    
26. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
    
27. * FOR
    
28. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
    
29. * DAMAGES
    
30. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    
31. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
    
32. * ON
    
33. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    
34. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
    
35. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    
36. */
    
37. 
    
38. #ifndef __FLEXSPI_NOR_FLASH_H__
    
39. #define __FLEXSPI_NOR_FLASH_H__
    
40. 
    
41. #include <stdint.h>
    
42. #include <stdbool.h>
    
43. #include "fsl_common.h"
    
44. 
    
45. /* FLEXSPI memory config block related defintions */
    
46. #define FLEXSPI_CFG_BLK_TAG (0x42464346UL)     // ascii "FCFB" Big Endian
    
47. #define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) // V1.4.0
    
48. #define FLEXSPI_CFG_BLK_SIZE (512)
    
49. 
    
50. /* FLEXSPI Feature related definitions */
    
51. #define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1
    
52. 
    
53. /* Lookup table related defintions */
    
54. #define CMD_INDEX_READ 0
    
55. #define CMD_INDEX_READSTATUS 1
    
56. #define CMD_INDEX_WRITEENABLE 2
    
57. #define CMD_INDEX_WRITE 4
    
58. 
    
59. #define CMD_LUT_SEQ_IDX_READ 0
    
60. #define CMD_LUT_SEQ_IDX_READSTATUS 1
    
61. #define CMD_LUT_SEQ_IDX_WRITEENABLE 3
    
62. #define CMD_LUT_SEQ_IDX_WRITE 9
    
63. 
    
64. #define CMD_SDR 0x01
    
65. #define CMD_DDR 0x21
    
66. #define RADDR_SDR 0x02
    
67. #define RADDR_DDR 0x22
    
68. #define CADDR_SDR 0x03
    
69. #define CADDR_DDR 0x23
    
70. #define MODE1_SDR 0x04
    
71. #define MODE1_DDR 0x24
    
72. #define MODE2_SDR 0x05
    
73. #define MODE2_DDR 0x25
    
74. #define MODE4_SDR 0x06
    
75. #define MODE4_DDR 0x26
    
76. #define MODE8_SDR 0x07
    
77. #define MODE8_DDR 0x27
    
78. #define WRITE_SDR 0x08
    
79. #define WRITE_DDR 0x28
    
80. #define READ_SDR 0x09
    
81. #define READ_DDR 0x29
    
82. #define LEARN_SDR 0x0A
    
83. #define LEARN_DDR 0x2A
    
84. #define DATSZ_SDR 0x0B
    
85. #define DATSZ_DDR 0x2B
    
86. #define DUMMY_SDR 0x0C
    
87. #define DUMMY_DDR 0x2C
    
88. #define DUMMY_RWDS_SDR 0x0D
    
89. #define DUMMY_RWDS_DDR 0x2D
    
90. #define JMP_ON_CS 0x1F
    
91. #define STOP 0
    
92. 
    
93. #define FLEXSPI_1PAD 0
    
94. #define FLEXSPI_2PAD 1
    
95. #define FLEXSPI_4PAD 2
    
96. #define FLEXSPI_8PAD 3
    
97. 
    
98. #define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)                                                              \
    
99.     (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \
    
100.      FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
     
101. 
     
102. //!@brief Definitions for FlexSPI Serial Clock Frequency
     
103. typedef enum _FlexSpiSerialClockFreq
     
104. {
     
105.     kFlexSpiSerialClk_30MHz = 1,
     
106.     kFlexSpiSerialClk_50MHz = 2,
     
107.     kFlexSpiSerialClk_60MHz = 3,
     
108.     kFlexSpiSerialClk_75MHz = 4,
     
109.     kFlexSpiSerialClk_80MHz = 5,
     
110.     kFlexSpiSerialClk_100MHz = 6,
     
111.     kFlexSpiSerialClk_133MHz = 7,
     
112.     kFlexSpiSerialClk_166MHz = 8,
     
113.     kFlexSpiSerialClk_200MHz = 9,
     
114. } flexspi_serial_clk_freq_t;
     
115. 
     
116. //!@brief FlexSPI clock configuration type
     
117. enum
     
118. {
     
119.     kFlexSpiClk_SDR, //!< Clock configure for SDR mode
     
120.     kFlexSpiClk_DDR, //!< Clock configurat for DDR mode
     
121. };
     
122. 
     
123. //!@brief FlexSPI Read Sample Clock Source definition
     
124. typedef enum _FlashReadSampleClkSource
     
125. {
     
126.     kFlexSPIReadSampleClk_LoopbackInternally = 0,
     
127.     kFlexSPIReadSampleClk_LoopbackFromDqsPad = 1,
     
128.     kFlexSPIReadSampleClk_LoopbackFromSckPad = 2,
     
129.     kFlexSPIReadSampleClk_ExternalInputFromDqsPad = 3,
     
130. } flexspi_read_sample_clk_t;
     
131. 
     
132. 
     
133. //!@brief Misc feature bit definitions
     
134. enum
     
135. {
     
136.     kFlexSpiMiscOffset_DiffClkEnable = 0,            //!< Bit for Differential clock enable
     
137.     kFlexSpiMiscOffset_Ck2Enable = 1,                //!< Bit for CK2 enable
     
138.     kFlexSpiMiscOffset_ParallelEnable = 2,           //!< Bit for Parallel mode enable
     
139.     kFlexSpiMiscOffset_WordAddressableEnable = 3,    //!< Bit for Word Addressable enable
     
140.     kFlexSpiMiscOffset_SafeConfigFreqEnable = 4,     //!< Bit for Safe Configuration Frequency enable
     
141.     kFlexSpiMiscOffset_PadSettingOverrideEnable = 5, //!< Bit for Pad setting override enable
     
142.     kFlexSpiMiscOffset_DdrModeEnable = 6,            //!< Bit for DDR clock confiuration indication.
     
143. };
     
144. 
     
145. //!@brief Flash Type Definition
     
146. enum
     
147. {
     
148.     kFlexSpiDeviceType_SerialNOR = 1,       //!< Flash devices are Serial NOR
     
149.     kFlexSpiDeviceType_SerialNAND = 2,      //!< Flash devices are Serial NAND
     
150.     kFlexSpiDeviceType_SerialRAM = 3,       //!< Flash devices are Serial RAM/HyperFLASH
     
151.     kFlexSpiDeviceType_MCP_NOR_NAND = 0x12, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND
     
152.     kFlexSpiDeviceType_MCP_NOR_RAM = 0x13,  //!< Flash deivce is MCP device, A1 is Serial NOR, A2 is Serial RAMs
     
153. };
     
154. 
     
155. //!@brief Flash Pad Definitions
     
156. enum
     
157. {
     
158.     kSerialFlash_1Pad = 1,
     
159.     kSerialFlash_2Pads = 2,
     
160.     kSerialFlash_4Pads = 4,
     
161.     kSerialFlash_8Pads = 8,
     
162. };
     
163. 
     
164. //!@brief FlexSPI LUT Sequence structure
     
165. typedef struct _lut_sequence
     
166. {
     
167.     uint8_t seqNum; //!< Sequence Number, valid number: 1-16
     
168.     uint8_t seqId;  //!< Sequence Index, valid number: 0-15
     
169.     uint16_t reserved;
     
170. } flexspi_lut_seq_t;
     
171. 
     
172. //!@brief Flash Configuration Command Type
     
173. enum
     
174. {
     
175.     kDeviceConfigCmdType_Generic,    //!< Generic command, for example: configure dummy cycles, drive strength, etc
     
176.     kDeviceConfigCmdType_QuadEnable, //!< Quad Enable command
     
177.     kDeviceConfigCmdType_Spi2Xpi,    //!< Switch from SPI to DPI/QPI/OPI mode
     
178.     kDeviceConfigCmdType_Xpi2Spi,    //!< Switch from DPI/QPI/OPI to SPI mode
     
179.     kDeviceConfigCmdType_Spi2NoCmd,  //!< Switch to 0-4-4/0-8-8 mode
     
180.     kDeviceConfigCmdType_Reset,      //!< Reset device command
     
181. };
     
182. 
     
183. //!@brief FlexSPI Memory Configuration Block
     
184. typedef struct _FlexSPIConfig
     
185. {
     
186.     uint32_t tag;               //!< [0x000-0x003] Tag, fixed value 0x42464346UL
     
187.     uint32_t version;           //!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix
     
188.     uint32_t reserved0;         //!< [0x008-0x00b] Reserved for future use
     
189.     uint8_t readSampleClkSrc;   //!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
     
190.     uint8_t csHoldTime;       //!< [0x00d-0x00d] CS hold time, default value: 3
     
191.     uint8_t csSetupTime;      //!< [0x00e-0x00e] CS setup time, default value: 3
     
192.     uint8_t columnAddressWidth; //!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For
     
193.     //! Serial NAND, need to refer to datasheet
     
194.     uint8_t deviceModeCfgEnable; //!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable
     
195.     uint8_t deviceModeType; //!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch,
     
196.     //! Generic configuration, etc.
     
197.     uint16_t waitTimeCfgCommands; //!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for
     
198.     //! DPI/QPI/OPI switch or reset command
     
199.     flexspi_lut_seq_t deviceModeSeq; //!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt
     
200.     //! sequence number, [31:16] Reserved
     
201.     uint32_t deviceModeArg;    //!< [0x018-0x01b] Argument/Parameter for device configuration
     
202.     uint8_t configCmdEnable;   //!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
     
203.     uint8_t configModeType[3]; //!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
     
204.     flexspi_lut_seq_t
     
205.         configCmdSeqs[3]; //!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq
     
206.     uint32_t reserved1;   //!< [0x02c-0x02f] Reserved for future use
     
207.     uint32_t configCmdArgs[3];     //!< [0x030-0x03b] Arguments/Parameters for device Configuration commands
     
208.     uint32_t reserved2;            //!< [0x03c-0x03f] Reserved for future use
     
209.     uint32_t controllerMiscOption; //!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more
     
210.     //! details
     
211.     uint8_t deviceType;    //!< [0x044-0x044] Device Type:  See Flash Type Definition for more details
     
212.     uint8_t sflashPadType; //!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal
     
213.     uint8_t serialClkFreq; //!< [0x046-0x046] Serial Flash Frequencey, device specific definitions, See System Boot
     
214.     //! Chapter for more details
     
215.     uint8_t lutCustomSeqEnable; //!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot
     
216.     //! be done using 1 LUT sequence, currently, only applicable to HyperFLASH
     
217.     uint32_t reserved3[2];           //!< [0x048-0x04f] Reserved for future use
     
218.     uint32_t sflashA1Size;           //!< [0x050-0x053] Size of Flash connected to A1
     
219.     uint32_t sflashA2Size;           //!< [0x054-0x057] Size of Flash connected to A2
     
220.     uint32_t sflashB1Size;           //!< [0x058-0x05b] Size of Flash connected to B1
     
221.     uint32_t sflashB2Size;           //!< [0x05c-0x05f] Size of Flash connected to B2
     
222.     uint32_t csPadSettingOverride;   //!< [0x060-0x063] CS pad setting override value
     
223.     uint32_t sclkPadSettingOverride; //!< [0x064-0x067] SCK pad setting override value
     
224.     uint32_t dataPadSettingOverride; //!< [0x068-0x06b] data pad setting override value
     
225.     uint32_t dqsPadSettingOverride;  //!< [0x06c-0x06f] DQS pad setting override value
     
226.     uint32_t timeoutInMs;            //!< [0x070-0x073] Timeout threshold for read status command
     
227.     uint32_t commandInterval;        //!< [0x074-0x077] CS deselect interval between two commands
     
228.     uint16_t dataValidTime[2]; //!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in terms of 0.1ns
     
229.     uint16_t busyOffset;       //!< [0x07c-0x07d] Busy offset, valid value: 0-31
     
230.     uint16_t busyBitPolarity;  //!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 -
     
231.     //! busy flag is 0 when flash device is busy
     
232.     uint32_t lookupTable[64];           //!< [0x080-0x17f] Lookup table holds Flash command sequences
     
233.     flexspi_lut_seq_t lutCustomSeq[12]; //!< [0x180-0x1af] Customizable LUT Sequences
     
234.     uint32_t reserved4[4];              //!< [0x1b0-0x1bf] Reserved for future use
     
235. } flexspi_mem_config_t;
     
236. 
     
237. /*  */
     
238. #define NOR_CMD_INDEX_READ CMD_INDEX_READ               //!< 0
     
239. #define NOR_CMD_INDEX_READSTATUS CMD_INDEX_READSTATUS   //!< 1
     
240. #define NOR_CMD_INDEX_WRITEENABLE CMD_INDEX_WRITEENABLE //!< 2
     
241. #define NOR_CMD_INDEX_ERASESECTOR 3                     //!< 3
     
242. #define NOR_CMD_INDEX_PAGEPROGRAM CMD_INDEX_WRITE       //!< 4
     
243. #define NOR_CMD_INDEX_CHIPERASE 5                       //!< 5
     
244. #define NOR_CMD_INDEX_DUMMY 6                           //!< 6
     
245. #define NOR_CMD_INDEX_ERASEBLOCK 7                      //!< 7
     
246. 
     
247. #define NOR_CMD_LUT_SEQ_IDX_READ CMD_LUT_SEQ_IDX_READ //!< 0  READ LUT sequence id in lookupTable stored in config block
     
248. #define NOR_CMD_LUT_SEQ_IDX_READSTATUS \
     
249.     CMD_LUT_SEQ_IDX_READSTATUS //!< 1  Read Status LUT sequence id in lookupTable stored in config block
     
250. #define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \
     
251.     2 //!< 2  Read status DPI/QPI/OPI sequence id in lookupTable stored in config block
     
252. #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \
     
253.     CMD_LUT_SEQ_IDX_WRITEENABLE //!< 3  Write Enable sequence id in lookupTable stored in config block
     
254. #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \
     
255.     4 //!< 4  Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block
     
256. #define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5 //!< 5  Erase Sector sequence id in lookupTable stored in config block
     
257. #define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8  //!< 8 Erase Block sequence id in lookupTable stored in config block
     
258. #define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM \
     
259.     CMD_LUT_SEQ_IDX_WRITE                //!< 9  Program sequence id in lookupTable stored in config block
     
260. #define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11 //!< 11 Chip Erase sequence in lookupTable id stored in config block
     
261. #define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13 //!< 13 Read SFDP sequence in lookupTable id stored in config block
     
262. #define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \
     
263.     14 //!< 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block
     
264. #define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \
     
265.     15 //!< 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk
     
266. 
     
267. 
     
268. /*
     
269. *  Serial NOR configuration block
     
270. */
     
271. typedef struct _flexspi_nor_config
     
272. {
     
273.     flexspi_mem_config_t memConfig; //!< Common memory configuration info via FlexSPI
     
274.     uint32_t pageSize;              //!< Page size of Serial NOR
     
275.     uint32_t sectorSize;            //!< Sector size of Serial NOR
     
276.     uint8_t ipcmdSerialClkFreq;     //!< Clock frequency for IP command
     
277.     uint8_t isUniformBlockSize;     //!< Sector/Block size is the same
     
278.     uint8_t reserved0[2];           //!< Reserved for future use
     
279.     uint8_t serialNorType;          //!< Serial NOR Flash type: 0/1/2/3
     
280.     uint8_t needExitNoCmdMode;      //!< Need to exit NoCmd mode before other IP command
     
281.     uint8_t halfClkForNonReadCmd;   //!< Half the Serial Clock for non-read command: true/false
     
282.     uint8_t needRestoreNoCmdMode;   //!< Need to Restore NoCmd mode after IP commmand execution
     
283.     uint32_t blockSize;             //!< Block size
     
284.     uint32_t reserve2[11];          //!< Reserved for future use
     
285. } flexspi_nor_config_t;
     
286. 
     
287. #ifdef __cplusplus
     
288. extern "C" {
     
289. #endif
     
290. 
     
291. #ifdef __cplusplus
     
292. }
     
293. #endif
     
294. 
     
295. #endif // __FLEXSPI_NOR_FLASH_H__
     

复制代码

eric2013

之前论坛网友给官方评估板做的XIP例子，也是用的这几个文件，可以作为测试对比：
https://forum.anfulai.cn/forum.p ... 9&highlight=xip

unknownuser

这里面的东西要对照 FlexSPI 这一章去看才能看明白。Lookup table总共支持16组，每组又有8个子序列。对于非HyperFLASH这种的，每组都能表示一个完整的FLASH的操作序列，比如 Write Enable, Page Program, 所以lutCustomEnable以及lutCustomSeq是不需要的，对于HyperFLASH,由于除读之外的命令都需要多个序列才能完成，所以需要用lutCustomSequence来指定需要多少条序列来完成这些操作。

eric2013

unknownuser 发表于 2018-2-19 09:40
这里面的东西要对照 FlexSPI 这一章去看才能看明白。Lookup table总共支持16组，每组又有8个子序列。对于非 ...

感谢大神告知