https://github.com/Open-CMSIS-Pack/CMSIS-Driver_STM32
STM32给所有系列提供的CMSIS-Driver驱动开头都有个CubeMX配置说明可以参考
非常具有参考价值，这个配置主要是方便大家配置GPIO引脚, NVIC等
以以太网为例
[C] 纯文本查看 复制代码 /*! \page eth_mac_stm32 Ethernet MAC
# Revision History
- Version 3.0
- Initial release
# Requirements
This driver requires the STM32 device specific **HAL** and **STM32CubeMX** (CubeMX) initialization code generator.
The driver instance is mapped to hardware as shown in the table below:
CMSIS Driver Instance | STM32 Hardware Resource
:---------------------|:-----------------------
Driver_ETH_MAC0 | EMAC
# Deviations
This driver has the following deviations from the CMSIS-Driver specification:
__Conceptual__ deviations:
- CubeMX generated initialization code (function MX_ETH_Init) already configures
the peripheral. Power, clocks, pins, and interrupts are enabled after execution
of initialization that executes in `main.c`.
__Functional__ deviations:
- GetCapabilities:
- depends on the code generated by CubeMX.
- Initialize:
- depends on the code generated by CubeMX.
- does not initialize the pins.
- Uninitialize:
- does not de-initialize the pins.
- PowerControl:
- depends on the code generated by CubeMX.
- low-power mode is not supported by HAL.
- SetAddressFilter:
- not supported by HAL.
- GetRxFrameTime:
- not supported by HAL.
- GetTxFrameTime:
- not supported by HAL.
- Control:
- not supported control codes: ARM_ETH_MAC_CONTROL_TX, ARM_ETH_MAC_FLUSH, and ARM_ETH_MAC_SLEEP.
- for control code ARM_ETH_MAC_VLAN_FILTER the VLAN filter disable is not supported.
- ControlTimer:
- not supported by HAL.
# CubeMX Configuration
This driver requires the following configuration in CubeMX:
- **clock**: appropriate **AHB clock** used for clocking Ethernet MAC controller.
- **peripheral**: **ETH** peripheral configured as **MII** or **RMII** mode
and **Parameter Settings** configured as desired.
- **pins**:
- for **RMII** mode: **ETH_CRS_DV**, **ETH_MDC**, **ETH_MDIO**, **ETH_REF_CLK**, **ETH_RXD0**
, **ETH_RXD1**, **ETH_TXD0**, **ETH_TXD1** and **ETH_TX_EN pins**.
- for **MII** mode: **ETH_COL**, **ETH_CRS**, **ETH_MDC**, **ETH_MDIO**, **ETH_RXD0**
, **ETH_RXD1**, **ETH_RXD2**, **ETH_RXD3**, **ETH_RX_CLK**, **ETH_RX_DV**, **ETH_TXD0**
, **ETH_TXD1**, **ETH_TXD2**, **ETH_TXD3**, **ETH_TX_CLK** and **ETH_TX_EN pins**.
- **interrupts**: enabled **Ethernet global interrupt** and **IRQ handlers** that **Call HAL handlers**.
> **Notes**
>
> - configuration information in the **MX_Device.h** file is based on CubeMX configuration.
> - for devices with cache, ensure that ETH DMA descriptors (**DMARxDscrTab** and **DMATxDscrTab**)
> are located in **non-cacheable** and **non-shareable device memory**.
> - for devices with cache, ensure that ETH data buffers (**eth_mac0_rx_buf** and **eth_mac0_tx_buf**)
> are located in **non-cacheable** and **non-shareable normal memory**.
## Example
### Pinout & Configuration tab
1. In the **Pinout view** window click on a pin and select it's functionality:
Pin | Functionality
:--------|:--------------------:
PA1 | **ETH_REF_CLK**
PA2 | **ETH_MDIO**
PA7 | **ETH_CRS_DV**
PC1 | **ETH_MDC**
PC4 | **ETH_RXD0**
PC5 | **ETH_RXD1**
PG11 | **ETH_TX_EN**
PG12 | **ETH_TXD1**
PG13 | **ETH_TXD0**
\n
2. Under **Categories**: **Connectivity** select **ETH**:
__Mode__:
- Mode: **RMII**
__Configuration__:
- Parameter Settings:
General: Ethernet Configuration | Value
:-------------------------------|:---------------:
Ethernet MAC Address | unused
Tx Descriptor Length | **4**
First Tx Descriptor Address | **0x30040060**
Rx Descriptor Length | **4**
First Rx Descriptor Address | **0x30040000**
Rx Buffers Length | **1524**
\n
- GPIO Settings:
Pin Name | Signal on Pin | Pin Context..| GPIO output..| GPIO mode | GPIO Pull-up/Pull..| Maximum out..| Fast Mode | User Label
:--------|:-------------:|:------------:|:------------:|:-----------------------------:|:------------------:|:------------:|:---------:|:----------:
PA1 | ETH_REF_CLK | n/a | n/a | Alternate Function Push Pull | No pull-up and no..| **High** | n/a |.
PA2 | ETH_MDIO | n/a | n/a | Alternate Function Push Pull | No pull-up and no..| **High** | n/a |.
PA7 | ETH_CRS_DV | n/a | n/a | Alternate Function Push Pull | No pull-up and no..| **High** | n/a |.
PC1 | ETH_MDC | n/a | n/a | Alternate Function Push Pull | No pull-up and no..| **High** | n/a |.
PC4 | ETH_RXD0 | n/a | n/a | Alternate Function Push Pull | No pull-up and no..| **High** | n/a |.
PC5 | ETH_RXD1 | n/a | n/a | Alternate Function Push Pull | No pull-up and no..| **High** | n/a |.
PG11 | ETH_TX_EN | n/a | n/a | Alternate Function Push Pull | No pull-up and no..| **High** | n/a |.
PG12 | ETH_TXD1 | n/a | n/a | Alternate Function Push Pull | No pull-up and no..| **High** | n/a |.
PG13 | ETH_TXD0 | n/a | n/a | Alternate Function Push Pull | No pull-up and no..| **High** | n/a |.
\n
3. Under **Categories**: **System Core** select **NVIC**:
__Configuration__:
- NVIC:
NVIC Interrupt Table | Enabled | Preemption Priority | Sub Priority
:---------------------------------|:-----------:|:-------------------:|:------------:
Ethernet global interrupt | **checked** | 0 | 0
- Code generation:
Enabled interrupt table | Select for..| Generate Enable in..| Generate IRQ h.. | Call HAL handler
:---------------------------------|:-----------:|:-------------------:|:----------------:|:----------------:
Ethernet global interrupt | unchecked | checked | checked | checked
\n
4. Under **Categories**: **System Core** select **CORTEX_M7**:
__Configuration__:
- Parameter Settings:
Speculation default mode Settings | Value
:-----------------------------------------------|:-------------------------:
Speculation default mode | Disabled
\n
Cortex Interface Settings | Value
:-----------------------------------------------|:-------------------------:
CPU ICache | Enabled
CPU DCache Length | Enabled
\n
Cortex Memory Protection Unit Control Settings | Value
:-----------------------------------------------|:-------------------------:
MPU Control Mode | Background Region Privileged accesses only + MPU disabled during hard fault
\n
Cortex Memory Protection Unit Region 0 Settings | Value
:-----------------------------------------------|:-------------------------:
MPU Region | **Enabled**
MPU Region Base Address | **0x24000000**
MPU Region Size | **512kB**
MPU SubRegion Disable | **0x0**
MPU TEX field level | **level 1**
MPU Access Permission | **ALL ACCESS PERMITTED**
MPU Instruction Access | **DISABLE**
MPU Shareability Permission | **DISABLE**
MPU Cacheable Permission | **ENABLE**
MPU Bufferable Permission | **ENABLE**
\n
Cortex Memory Protection Unit Region 1 Settings | Value
:-----------------------------------------------|:-------------------------:
MPU Region | **Enabled**
MPU Region Base Address | **0x30000000**
MPU Region Size | **512kB**
MPU SubRegion Disable | **0x0**
MPU TEX field level | **level 1**
MPU Access Permission | **ALL ACCESS PERMITTED**
MPU Instruction Access | **DISABLE**
MPU Shareability Permission | **DISABLE**
MPU Cacheable Permission | **DISABLE**
MPU Bufferable Permission | **DISABLE**
\n
Cortex Memory Protection Unit Region 2 Settings | Value
:-----------------------------------------------|:-------------------------:
MPU Region | **Enabled**
MPU Region Base Address | **0x30040000**
MPU Region Size | **256B**
MPU SubRegion Disable | **0x0**
MPU TEX field level | **level 0**
MPU Access Permission | **ALL ACCESS PERMITTED**
MPU Instruction Access | **DISABLE**
MPU Shareability Permission | **DISABLE**
MPU Cacheable Permission | **DISABLE**
MPU Bufferable Permission | **DISABLE**
\n
### Clock Configuration tab
1. Configure **To AHB1,2 Peripheral Clocks (MHz)**: **200**
### Project Manager tab
1. Under **Advanced Settings**:
__Generated Function Calls__:
Generate Code | Function Name | Peripheral Inst..| Do not generate ..| Visibility (Static)
:-------------|:---------------------------:|:----------------:|:-----------------:|:-------------------:
checked | MX_ETH_Init | ETH | unchecked | checked
## Source Code
Add **RxDecripSection**, **TxDecripSection**, <b>.driver.eth_mac0_rx_buf</b> and <b>.driver.eth_mac0_tx_buf</b>
sections to the Scatter file if GNU Compiler or Arm Compiler 6 is used.
Example:
~~~
RW_ETH_RX_DESC 0x30040000 0x00000060 {
*(.RxDecripSection)
}
RW_ETH_TX_DESC 0x30040060 0x00000060 {
*(.TxDecripSection)
}
RW_ETH_RX_BUF 0x30040100 0x00001800 {
*(.driver.eth_mac0_rx_buf)
}
RW_ETH_TX_BUF 0x30041900 0x00001800 {
*(.driver.eth_mac0_tx_buf)
}
~~~
*/
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发表于 2025-12-29 02:09:45
发表于 2025-12-30 14:08:38
